RevLib is an online resource for benchmarks within the domain of reversible and quantum circuit design
Universität Bremen References Cite RevLib Acknowledgements About RevLib
Multiple statements (mult_stmts)


A circuit computing the statement a += ((b & c) + ((d * e) - f)) using multiple statements with shorter expressions.


Download: mult_stmts_245.src

Circuit Realizations:

Lib. lines gates costs File Pic. Ref. Notes
MCT+MCF 128 1066 6122 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines; 16 bit
MCT+MCF 256 3938 25282 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines; 32 bit
MCT+MCF 128 1066 6122 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines; 16 bit
MCT+MCF 256 3938 25282 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines; 32 bit
MCT+MCF 112 1820 11572 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V); 16 bit
MCT+MCF 224 7228 49172 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V); 32 bit
MCT+MCF 128 1066 6122 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines; 16 bit
MCT+MCF 256 3938 25282 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines; 32 bit
MCT+MCF 128 1066 6122 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines; 16 bit
MCT+MCF 256 3938 25282 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines; 32 bit
MCT+MCF 112 1820 11572 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme; 16 bit
MCT+MCF 224 7228 49172 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme; 32 bit
 
legend


 back