// This is a SyReC-file describing a circuit computing the statement a += ((b & c) + ((d * e) - f)) using multiple statements with shorter expressions.
// This file has been taken from RevLib (www.revlib.org). 

module main( inout a, inout b, inout c, inout d, inout e, inout f )
  
  a += ( b & c );
  a += ( d * e );
  a -= f
