RevLib is an online resource for benchmarks within the domain of reversible and quantum circuit design
Universitšt Bremen References Cite RevLib Acknowledgements About RevLib
Nested control structure (larger) (nestedif2)


A circuit with a nested control structure.


Download: nestedif2_249.src

Circuit Realizations:

Lib. lines gates costs File Pic. Ref. Notes
MCT+MCF 38 240 8423 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines; 16 bit
MCT+MCF 70 464 31703 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines; 32 bit
MCT+MCF 134 428 6034 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines; 16 bit
MCT+MCF 262 844 26674 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines; 32 bit
MCT+MCF 37 256 8504 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V); 16 bit
MCT+MCF 69 480 31784 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V); 32 bit
MCT+MCF 39 250 5243 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines; 16 bit
MCT+MCF 71 474 17269 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines; 32 bit
MCT+MCF 135 438 3809 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines; 16 bit
MCT+MCF 263 854 14424 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines; 32 bit
MCT+MCF 38 266 5324 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme; 16 bit
MCT+MCF 70 490 17350 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme; 32 bit
 
legend


 back