RevLib is an online resource for benchmarks within the domain of reversible and quantum circuit design
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CPU ALU over 32 bit (cpu_alu_32bit)


An arithmetic-logic unit of a RISC CPU as specified in [WSG+:2011] with a bit-width of 32.


Download: cpu_alu_32bit_243.src

Circuit Realizations:

Lib. lines gates costs File Pic. Ref. Notes
MCT+MCF 756 20381 2235491 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines
MCT+MCF 6204 31128 112396 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines
MCT+MCF 254 40975 4381653 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V)
MCT+MCF 757 20875 178783 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines
MCT+MCF 6205 31132 107136 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines
MCT+MCF 255 41841 331151 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme
 
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